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MSP430x11x1
MIXED SIGNAL MICROCONTROLLER
SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000
18
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
peripherals
Peripherals are connected to the CPU through data, address, and control buses and can be handled easily with
memory manipulation instructions.
oscillator and system clock
Three clocks are used in the system—the system (master) clock MCLK, the subsystem (master) clock SMCLK,
and the auxiliary clock ACLK:
Main system clock MCLK, used by the CPU and the system
Subsystem clock SMCLK, used by the peripheral modules
Auxiliary clock ACLK, originated by LFXT1CLK (crystal frequency) and used by the peripheral modules
After a POR, the DCOCLK is used by default, the DCOR bit is reset, and the DCO is set to the nominal initial
frequency. Additionally, if LFXT1CLK fails as the source for MCLK, the DCOCLK is automatically selected to
ensure fail-safe operation.
SMCLK can be generated from LFXT1CLK or DCOCLK. ACLK is always generated from LFXT1CLK.
The crystal oscillator can be defined to operate with watch crystals (32768 Hz) or with higher-frequency ceramic
resonators or crystals. The crystal or ceramic resonator is connected across two terminals. No external
components are required for watch-crystal operation. If the high frequency XT1 mode is selected, external
capacitors from XIN to VSS and XOUT to VSS are required as specified by the crystal manufacturer.
The LFXT1 oscillator starts after applying VCC. If the OscOff bit is set to 1, the oscillator stops when it is not
used for MCLK. The clock signals ACLK and SMCLK may be used externally via port pins.
Different application requirements and system conditions dictate different system clock requirements, including:
High frequency for quick reaction to system hardware requests or events
Low frequency to minimize current consumption, EMI, etc.
Stable peripheral clock for timer applications, such as real-time clock (RTC)
Start-stop operation to be enabled with minimum delay