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AMX 68000 Target Guide
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3.2 AMX Vector Table
The M68000 processor provides an Exception Vector Table, often referred to as the
AMX Vector Table, through which device interrupts are vectored and processor faults are
trapped. The position of entries in the table and the vector numbers used to reference
them are dictated by Motorola.
AMX provides a set of cjksixxxx service procedures to allow you to dynamically access
or modify entries in the AMX Vector Table. The Motorola vector numbers must be used
in all calls to these procedures to identify entries in the table.
Device Interrupts
AMX uses the AMX Vector Table to maintain pointers to Interrupt Service Procedures
for all of the device interrupts to which the processor will respond. AMX does not
provide a default Interrupt Service Procedure for every device interrupt. However, AMX
does provide a default exception service procedure for the spurious interrupt (vector
number 24) and the uninitialized interrupt (vector number 15).
Processor Exceptions
AMX maintains entries in the AMX Vector Table for all of the processor exceptions for
which AMX assumes responsibility. These entries in the Vector Table are identified by
Motorola's exception vector numbers which are defined in AMX header file CJ532KT.H.
Figure 3.2-1 summarizes the exception vector mnemonics.
A 32-bit mask in your Target Parameter File is used to specify which of the possible
exceptions you wish AMX to service. The mask bits are defined in Figure 3.2-1. The
AMX Configuration Builder (see Chapter 4) puts a directive in your Target Parameter
File to specify the mask required to meet your configuration requirements.
If an enable mask bit is not defined in Figure 3.2-1 for a particular exception, then AMX
will not provide a default exception service procedure for that exception. For example,
AMX does not provide service for the
TRAP n vectors (vector numbers 32 to 47). Hence,
all software traps are available for use by your application.
AMX does not provide default exception service procedures for any of the entries which
Motorola has declared as undefined but reserved.