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AMX 68000 Target Guide
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rev6 A-3
A.2 Target Parameter File Directives
The AMX Launch Parameters are defined as follows.
...LAUNCH PERM,VNA
PERM
0 if the AMX launch is temporary
1 if the AMX launch is permanent
VNA 0 if the AMX Vector Table entries are to be alterable
1 if the AMX Vector Table entries are NOT to be alterable
You must set VNA to 0 to allow AMX or your application to dynamically install exception
handlers into the AMX Vector Table at run time. If you set
VNA to 0, you must also set
EVTROM to 0 in the ...HDW keyword entry. If you set VNA to 1, you must initialize the
AMX Vector Table entries for AMX use as described in Chapter 3.6.
The Target Parameter File includes a set of hardware definitions.
...HDW PROC,VMASK,VBR,EVTROM,CACHE
PROC
Processor identifier
VMASK = $MMMMMMMM = AMX exception vector mask
VBR = $xxxxxxxx = A(Exception Vector Table) for VBR
= -1 if VBR is read only
EVTROM 0 if the AMX Vector Table is to be in RAM
1 if the AMX Vector Table is to be in ROM
CACHE 0 if cache is to be ignored by AMX at launch
1 if cache is to be enabled by AMX at launch
The PROC parameter is a string used to identify the processor architecture. PROC must be
one of:
68000, 68008, 68302, 68306, 68328, {68000 core}
68010, 68020, 68030, 68040, 68060, {68020 core}
68330, 68331, 68332, 68340, 68341, 68360, {CPU32 core}
5102 {68040 core}
Set bit N of the VMASK Exception Vector Mask for each of the exceptions which are to be
serviced by AMX. For example, set this parameter to $FF00EFFE to allow AMX to
handle all exceptions. Bits in the mask are defined in Figure 3.2-1. When you are using
AMX with a debugger, do not set any of the mask bits for exceptions which the debugger
services. For example, a mask of
$000041EC is commonly used with many debuggers.
The
CACHE parameter can be used to instruct AMX to enable the M68000 instruction and
data caches when AMX is launched. If the processor or architecture selected with
parameter
PROC has no cache control, set parameter CACHE to 0.