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AMX 68000 Target Guide
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3.6 Processor Vector Initialization
Whenever an internal or external device interrupt occurs, the M68000 processor
unconditionally vectors to a unique memory address determined by an entry in the
processor Exception Vector Table. The code located at that address is called an Interrupt
Service Procedure.
Whenever an exception occurs, the M68000 processor also unconditionally vectors to a
unique memory address determined by an entry in the processor Exception Vector Table.
The code located at that address is called an exception handler.
Your Target Parameter File defines whether the Exception Vector Table is in ROM or
RAM. The Target Parameter File further qualifies whether or not AMX is allowed to
modify the table if it is in RAM.
If the table is declared to be alterable, AMX will allow you to dynamically install
pointers to ISPs and exception handlers into the Exception Vector Table.
If the Exception Vector Table is in RAM and the table is declared to be alterable, AMX
will install pointers to the AMX Exception Supervisor into selected exception vectors in
the Exception Vector Table.
If the Exception Vector Table is unalterable (in ROM or simply constant by design), then
it is your responsibility to initialize the vector table to meet your requirements. The
address of a unique AMX exception handler must be installed in each entry in the
Exception Vector Table for which AMX is to be responsible.
Each AMX exception handler is located at an offset from entry point cj_kdevt in your
Target Configuration Module. Each offset is a multiple of 8 bytes. The AMX exception
mask identifies the specific exceptions which AMX must handle. An exception is
supported if its mask bit (see Figure 3.2-1) is enabled in the AMX exception mask. The
AMX exception handler for the exception identified by mask bit j is located at byte
address cj_kdevt+(i*8) where i is one less than the sum of the enabled bits in the
AMX exception mask, counted from bit 0 to bit j inclusive.
For example, if vectors 2 (bus error) through 8 (privilege violation) inclusive are the only
vectors to be serviced by AMX, the AMX exception mask will have value 0x000001FC.
The AMX bus error exception handler will be found at entry point
cj_kdevt (enable
mask is 0x0004, j is 2, the bit sum is 1 and i is therefore 0). The AMX privilege
violation exception handler will be found at entry point cj_kdevt+(6*8) (enable mask is
0x0100, j is 8, the bit sum is 7 and i is therefore 6).
You must also initialize entries in the Exception Vector Table for each interrupt which
your application can generate. For each interrupting device, you must install the address
of the device's Interrupt Service Procedure (ISP) into the device's entry in the vector
table. For each conforming ISP or clock ISP, the address is the pointer to the ISP root
named in your AMX Target Configuration Module. For prebuilt AMX clock drivers, you
can determine the ISP root name by examining the call to
cjksivtx() in procedure
chclockinit() in the clock driver source module.