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RX900 S1 Maintenance Manual 361
Appendix
CPU#8 0 -- -- -- -- -- -- -- -- -- -- -- -- #4
1 ----------------x------
2 ----------------xx ----
3 ----------------xx x--
4 ----------------xx xx
CPU
No.
DIMM
slot
pop.
order
4 CPUMEMRs 6 CPUMEMRs 8 CPUMEMRs IOH
No.
1B
1D
1F
1H
1A
1C
1E
1G
2B
2D
2F
2H
2A
2C
2E
2G
1B
1D
1F
1H
1A
1C
1E
1G
2B
2D
2F
2H
2A
2C
2E
2G
1B
1D
1F
1H
1A
1C
1E
1G
2B
2D
2F
2H
2A
2C
2E
2G
Table 5: DIMM slot population order and mapping of DIMM slots to I/O Hubs and CPUs