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“State Clock Violates Overdrive Specification”
At least one 16-channel pod in the state analysis measurement stored a
different number of states before trigger than the other pods. This is usually
caused by sending a clocking signal to the state analyzer that does not meet
all of the specified conditions, such as minimum period, minimum pulse
width, or minimum amplitude. Poor pulse shaping could also cause this
problem.
The error message “State Clock Violates Overdrive Specification” should occur
only for HP 16510A/B, and HP 16511B Logic Analyzers with the Clock Period field
set to <60 ns. If this error message is observed with the Clock Period set to >60
ns, you may have a faulty logic analyzer. If a failure is suspected in your logic
analyzer, contact your nearest Hewlett-Packard Sales Office for information on
servicing the instrument.
“Time from Arm Greater Than 41.93 ms”
The state/timing analyzers have a counter to keep track of the time from
when an analyzer is armed to when it triggers. The width and clock rate of
this counter allow it to count for up to 41.93 ms before it overflows. Once the
counter has overflowed, the system does not have the data it needs to
calculate the time between module triggers. The system must know this time
to be able to display data from multiple modules on a single screen.
If You Have a Problem
“State Clock Violates Overdrive Specification”
5–15