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The Trigger Sequencer
Logic state and timing analyzer modules for the HP 16500C have
triggering and data storage features that allow you to capture only the
system activity of interest. Understanding how these features work
will help you set up analyzer trigger specifications that satisfy your
measurement needs.
There are several different logic analyzers available for the
HP 16500C. This discussion will focus on the HP 16550A, a 100-MHz
state/500-MHz timing analyzer. Most HP logic analyzers will be similar,
differing only in the number of available states, pattern resources,
range resources, and acquisition memory depth.
In the HP 16550A state analyzer, the trigger sequencer is a state
machine with a minimum of two states and a maximum of twelve
states. The trigger term can be any one of these states except the last.
The analyzer searches for a trigger sequence by matching input values
on the pods to branch conditions, which control transitions between
states. You can insert or delete states to make the trigger sequence as
simple or complex as needed for your application.
Trigger Sequence Specification
See the following figure, which shows a sequence specification with
four states. To define the trigger sequence, you specify
sequence-advance, sequence-else, storage, and trigger-on
specifications.
4–3