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©2004 Inova Computers GmbH Page 1-11Doc. PD00941013.001
ICP-CM
Product Overview
CompactPCI
®
1
1.4 Hardware
1.41 Block Diagram
Figure 1.41 Block Diagram
This block diagram is applicable to all Inova’s CM-based
CPUs. Components and/or functionality
may change without notice.
Note
32-bit with or without Rear I/O (RIO)
configurations are possible. User’s of
NI peripheral cards should check to
see whether signal conflict is possible
with the RIO option selected. If in
doubt, select the CPU version without
RIO. The universal PCI/PCI bridge
allows the CPU to exist as a Master or
Slave. Recognition is automatic
depending on the CPU’s physical
position within a CompactPCI system.