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©2004 Inova Computers GmbH Page E-1ICP-P4/PM/CM Appendix-E
Appendix E
AGP-R7000
CompactPCI
®
E
AGP-R7000
AGP-R7000
E1 AGP-R7000 CPU Extension....... E-2
Table E1.00 AGP Piggyback Configurations ................................................................................. E-2
E1.1 Specifications ........................................................................................... E-3
E1.2 J4 Interface ............................................................................................... E-4
Figure E1.20 J4 on the Underside of the AGP-R7000 Piggyback ................................................... E-4
Table E1.20 J4 Pinout ................................................................................................................. E-5
Table E1.20 J4 Pinout - Contd. .................................................................................................... E-6
E1.3 J3 & J5 IBP-GS-MULTILINK (TFT) Interfaces ............................................... E-7
Figure E1.30 J3 and J5 Topside Connectors for the Inova IPB-GS-MULTILINK ................................ E-7
Table E1.30 J3 & J5 Interface Pinout ........................................................................................... E-8
E1.4 J1 Front-Panel VGA/TMDS Interface .......................................................... E-9
Figure E1.40 Standard Front-Panel VGA/TMDS Interface ............................................................. E-9
Table E1.40 J1 Standard Front-Panel VGA/TMDS Pinout.............................................................. E-9
Table E1.41 J2 DIP Switch Settings - Digital TMDS (PanelLink) or DVI-D .................................... E-10
Table E1.42 J2 DIP Switch Settings - TFT (24Bit TTL/CMOS) ...................................................... E-10
E1.5 Rear I/O VGA Interface ........................................................................... E-11