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©2004 Inova Computers GmbHPage 3-10 Doc. PD00941013.001
Interfaces
ICP-CM
3.22 J17 VGA Interface
J17 is available on the CPU front-panel if this option is required and if this position is not already
occupied by an AGP piggyback for PanelLink (TFT) or GigaST
Ȣ
R communication. The 15-pin
high-density D-Sub connector forms the physical interface for the video on the ICP-CM which is
integrated within the chipset.
The amount of graphic memory allocated to the chipset video option is defined in BIOS. Vesa
resolutions up to 2048 x 1536 pixels with 32-bit colour depth are supported. Hence the full VGA,
SVGA, XGA, SXGA, UXGA, HDTV and QXGA scales are covered.
3.23 Graphic Features (Chipset)
Table 3.23a highlights just some of the features of the standard integrated video controller.
Feature Description
Supports single video windows with overlay function
Supports RGB555, RGB565, YUV422, and YUV420 video formats
Supports DVD sub-picture playback overlay
2x 120x128 video playback line buffers to support 1920x1080 video
Supports Direct Draw Drivers
Built-in 64x128 CRT FIFOs to support ultra high res. graphics
Programmable 24-bit true-colour RAMDAC up to 333MHz pixel clk
MPEG II video playback
Built-in TV encoder interface
Supports 333MHz clock
Supports VESA standard super high resolution graphics modes
Supports low-resolution modes (320x240, 512x384, 400x300)
Supports VESA Display Power Management Signalling
Supports clock throttling for 2D engine and 3D engine
Multimedia Application Supports RAMDAC snoop for multimedia applications
Video Accelerator
High Integration
Resolution, Colour & Frame Rate
Power Management