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12 Intel® 41110 Serial to Parallel PCI Bridge Design Guide
Introduction
Figure 2. 41110 Microcontroller Connections
2.5 JTAG
• Compliant with IEEE Standard Test Access Port and Boundary Scan Architecture 1149.1a
2.6 Related Documents
• .
• PCI Express Specification, Revision 1.0, from www.pci-sig.com.
• PCI Express Design Guide, Revision 0.5
• PCI Local Bus Specification, Revision 2.3, from www.pci-sig.com.
• PCI-X Addendum to the PCI Local Bus Specification, Revision 1.0a, from www.pci-sig.com.
• IEEE Standard Test Access Port and Boundary Scan Architecture 1149.1a
• System Management Bus Specification, Revision 2.0
Serial to
Parallel PCI
Bridge