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Chapter 2 - Hardware Installation
42
Table 2-15. Secondary Base Address For 256 Byte Short I/O (Continued)
NOTE: 0 = IN (Logical 0), F = OUT (Logical 1)
ADDRESS J23 PIN SETTINGS J24, J25, J26 PIN SETTINGS
15-16 13-14 11-12 9-10 7-8 5-6 3-4 1-2 J24 J25 J26
2800 0 0 0 F 0 F 0 0 0 0 0
2900 F 0 0 F 0 F 0 0 0 0 0
2A000F0F0F00000
2B00 F F 0 F 0 F 0 0 0 0 0
2C00 0 0 F F 0 F 0 0 0 0 0
2D00F0FF0F00000
2E00 0 F F F 0 F 0 0 0 0 0
2F00 F F F F 0 F 0 0 0 0 0
3000 0 0 0 0 F F 0 0 0 0 0
3100 F 0 0 0 F F 0 0 0 0 0
3200 0 F 0 0 F F 0 0 0 0 0
3300 F F 0 0 F F 0 0 0 0 0
3400 0 0 F 0 F F 0 0 0 0 0
3500 F 0 F 0 F F 0 0 0 0 0
3600 0 F F 0 F F 0 0 0 0 0
3700 F F F 0 F F 0 0 0 0 0
3800 0 0 0 F F F 0 0 0 0 0
3900 F 0 0 F F F 0 0 0 0 0
3A000F0FFF00000
3B00 F F 0 F F F 0 0 0 0 0
3C00 0 0 F F F F 0 0 0 0 0
3D00F0FFFF00000
3E00 0 F F F F F 0 0 0 0 0
3F00 F F F F F F 0 0 0 0 0
4000 0 0 0 0 0 0 F 0 0 0 0
4100 F 0 0 0 0 0 F 0 0 0 0
4200 0 F 0 0 0 0 F 0 0 0 0
4300 F F 0 0 0 0 F 0 0 0 0
4400 0 0 F 0 0 0 F 0 0 0 0
4500 F 0 F 0 0 0 F 0 0 0 0
4600 0 F F 0 0 0 F 0 0 0 0
4700 F F F 0 0 0 F 0 0 0 0
4800 0 0 0 F 0 0 F 0 0 0 0
4900 F 0 0 F 0 0 F 0 0 0 0
4A000F0F00F0000
4B00 F F 0 F 0 0 F 0 0 0 0
4C00 0 0 F F 0 0 F 0 0 0 0
4D00F0FF00F0000
4E00 0 F F F 0 0 F 0 0 0 0
4F00 F F F F 0 0 F 0 0 0 0