Kawasaki 80C51 Computer Hardware User Manual


 
KS152JB Universal Communications Controller
Technical Specifications
Kawasaki LSI USA, Inc. Page 110 of 120 Ver. 0.9 KS152JB2
TCON.3 (IE1) - External Interrupt 1 edge flag.
TCON.4 (TR0) - Timer 0 run control bit.
TCON.5 (TF0) - Timer 0 overflow flag.
TCON.6 (TR1) - Transmit Done flag, see TSTAT.
TCON.7 (TF1) - Timer 1 overflow flag.
TDN - Transmit Done Flag, see TSTAT
TEN - Transmit Enable bit, see TSTAT.
TFNF - Transmit FIFO Not Full Flag, see TSTAT.
TFIFO - (85H) TFIFO is a 3 byte FIFO that contains the transmission data for the GSC.
TH0 (08CH) - Timer 0 High Byte, contains the high byte for timer/counter 0.
TH1 (08DH) - Transmit Interrupt, see SCON.
TL0 (08AH) - Timer 0 Low byte, contains the low byte for timer/counter 0.
TL1 (08BH) - Timer 1 Low byte, contains the low byte for timer/counter 1.
TM - Transfer Mode, see DCON0.
TMOD (089H)
TMOD.0 (M0) - Mode selector bit for Timer 0.
TMOD.1 (M1) - Mode selector bit for Timer 0.
TMOD2 (C/
T) - Timer/Counter selector bit for Timer 0.
TMOD3 (GATE) - Gating Mode bit for Timer 0.
TMOD.4 (M0) - Mode selector bit for Timer 1.
TMOD.5 (M1) - Mode selector bit for Timer 1.
TMOD6 (C/
T) - Timer/Counter selector bit for Timer 1.
01234567
M0 GATE C/
TM1 M0M1C/TGATE