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KS152JB Universal Communications Controller
Technical Specifications
Kawasaki LSI USA, Inc. Page 98 of 120 Ver. 0.9 KS152JB2
RDN from being set.
A CRC Error means the CRC generator did not come to its correct value after calculating the
CRC of the message plus received CRC. An alignment error means the number of bits received
between the BOF and EOF was not a multiple of 8.
In SDLC mode, the CRC bit gets set at the end of any frame in which there is a CRC error, and the
AE bit gets set at the end of any frame in which there is an Alignment Error.
In CSMA/CD mode, if there is no CRC Error, neither CRCE nor AE will get set. If there is a CRC
error and no Alignment Error, the CRCE bit will get set, but not the AE bit. If there is both a CRC
Error and an Alignment Error, then the AE bit will get set, but not the CRCE bit. Thus in CSMA/
CD mode, the CRCE and AE bits are mutually exclusive.
The Receive Abort flag, RCABT, gets set if an incoming frame was interrupted after received data
had already passed to the Receive FIFO. In the SDLC mode, this can happen if a line idle condi-
tion is detected before an EOF flag is. In CSMA/CD mode, this can happen if there is a collision.
In either case, the CPU will have to re-initialize whatever pointers and counters it might have been
using.
The Overrun Error flag, OVR, gets set if the GSC Receiver is ready to push a newly received byte
onto the Receive FIFO, but the FIFO is full.
Up to 7 “dribble bits” can be received after the EOF without causing an error condition.
6.0 GLOSSARY
ADR0,1,2,3 (95H, 0A5H, 0B5H, 0C5H) - Address Match Registers 0, 1, 2, 3 - The contents of
these SFR’s are compared against the address bits from the serial data on the GSC. If the address
matches the SFR, then the C152 accepts that frame. If in 8 bit addressing mode a match with any
of the four registers will trigger acceptance. In the 16 bit addressing mode, a match with
ADR1:ADR0 or ADR3:ADR2 will be accepted. Address length is determined by GMOD (AL).
AE - Alignment Error, see RSTAT.
CRCE
AE
RCABT
GREN
EOF
RECEIVED
GSCRE
Clear
GREN
Set
RDN
OVR
Receive Error Flag
(Logic for Clearing GREN, Setting RDN)