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USER’S GUIDE
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53
MEMORY INTERCONNECT USING THE 128K SRAM Figure 5–5
13
54
+3v
+5v
12
10
74
28
27
20
22
16
14
52
DS5001FP/DS5002FP
V
CC
WE
CS1
A16
A15
A14–A0
D7–D0
GND
CS2
OE
128K x 8
SRAM
V
CCO
R/W
CE1
CE2
CE3
BA14–BA0
BD7–BD0
MSEL
V
CC
V
LI
PORT0
PORT1
PORT2
PORT3
GND
2
63
30
2
31
In the 128K x 8 configuration, the microprocessor con-
verts the CE3
into A15 and CE2 into A16. Grounding the
MSEL pin causes this configuration. The physical loca-
tion of program memory will be between addresses
00000 to 0FFFFh. Data memory will be located between
10000h and 1FFFFh. These physical locations are
transparent to the user. From a software perspective,
both program and data are located between 0000 and
FFFFh. When the MSEL pin is grounded, the device
cannot be partitioned. The MSL bit accessed through
the bootstrap loader is used to select access to the
64KB data or 64KB program segment via the loader in
the 128K x 8 configuration.
The Soft Microcontroller line has two modules based on
the DS5001 series. The DS2251T 128K Micro Stik uses
a DS5001FP. The DS2252T Secure Micro Stik is based
on the DS5002FP. All computing features are derived
from the DS5001. The DS5002 device provides
memory security features in addition. The modules are
available in 32K, 64K, and 128K byte versions. Two ex-
ample block diagrams are shown below.
Figure 5–6 is a block diagram of the DS2251T with 128K
bytes of NV RAM. This part can also be built with 32K or
64K bytes. In this case, the 128K RAM is replaced with
one or two 32K byte RAMs. Figure 5–7 shows a
DS2252T with 32K bytes of RAM. This part is also avail-
able in 64K or 128K byte versions. For 64K, two RAMs
are used. For 128K, the single 128K SRAM is used. This
is entirely transparent to the user and is provided for
completeness.