Filter
Top Products
USER’S GUIDE
050396 7/173
8
SECURE MICROCONTROLLER ARCHITECTURAL BLOCK DIAGRAM Figure 3–1
15
8
CE1
CE2
R/W
ADDRESS
ENCRYPTOR
DATA
ENCRYPTOR
TIMING
AND
CONTROL
TAMCONSECURITY
LOCK
LOGIC
PCON
TIMED
ACCESS
LOGIC
MEMORY
ALLOCATIONS
CTL. LOGIC
NONVOLATILE
CONTROL
INTERRUPT
CONTROL
IP
IE
INTERNAL DATA BUS
STACK
POINTER
PSW
IDR ADDR.
REGISTER
128
SCRATCH–
PAD
REGISTERS
WATCHDOG
TIMER
OSCILLATOR
INSTRUCTION
REGISTER
TIMING
AND
CONTROL
VCC VLI
XTAL1 XTAL2
VECTOR
RAM
PORT 0
LATCH
TEMP 1 TEMP 2
ACC
ALU
B
REGISTER
DPTR
BUFFER
PROGRAM
ADDR. REG.
PC
INCREMENTOR
PC
RESIDENT
LOADER
ROM
PORT 2
LATCH
INTERNAL ADDRESS BUS
INTERNAL DATA BUS
DRIVERSDRIVERS
PORT 2
DRIVERS
PORT 0
DRIVERS
ENCRYPT
KEY
88
8
8
8 8
16
SERIAL
I/O
TIMER
0
TIMER
1
TH1
TL1
TCON
TLMOD
TH0
TL0
SBUF
SCON
PORT 3
DRIVERS
PORT 1
DRIVERS
PORT 1
LATCH
PORT 3
LATCH
16
INTERNAL ADDRESS BUS
BYTE–WIDE
MEMORY
BUS
PSEN
ALE
EA
RST
EXTERNAL
PROGRAM/
DATA RAM