Filter
Top Products
Operation DMD15/DMD15L IBS/IDR Satellite Modem
3-8 TM051 – Rev. 5.8
3.8 Baseband Processor Card
The Baseband Processor Card (BB Card) contains two major subsystems⎯the Baseband
Processing System and the Monitor and Control Subsystem.
3.8.1 Baseband Processing
The Baseband Processor performs all of the functions required for an IBS/IDR Framing Unit, a
Reed-Solomon Codec, an E1/T1 Drop and Insert System and a Turbo Codec. In addition, the
Baseband Processing Section provides for Transmit clock selection and rate adaptation as well as
a rate adapter and Plesiochronous/Doppler (PD) Buffer in the receive direction. A multiplexer is
also provided for the SCT Clock Source for Loop Timing Applications. The transmit and receive
paths may be configured independently under processor control.
3.8.2 Tx Baseband Processing
As shown in Figure 3-7, the Tx Data and Clock enters the Baseband Processor, passes through a
Rate Adapting FIFO and enters the Framer/Drop Processor. In Closed-Net Mode, the data
passes through the framer unaltered. In IDR, IBS, and D&I Modes, the framer adds the
appropriate framing and ESC as defined in IESS-308 and 309. In D&I Mode, the framer acquires
the terrestrial framing structure, E1 or T1, and synchronizes the Drop Processor. The Drop
Processor extracts the desired time slots from the terrestrial data stream and feeds these
channels back to the framer. The framer then places the ‘dropped’ terrestrial time slots into the
desired satellite channel slots. The data is then sent to the Reed-Solomon Encoder.
The Reed-Solomon Encoder, if engaged, is designed as an installable option that encodes the
data into Reed-Solomon Blocks. The blocks are interleaved and synchronized to the frame
pattern as defined in IESS-308 and IESS-309. After Reed-Solomon Encoding, the composite
data and clock are applied to the BB Loopback Circuit.
Figure 3-7. DMD15/DMD15L Clock Logic