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Si5351A/B/C
60 Preliminary Rev. 0.95
Reset value = 0000 0000
Reset value = 0000 0000
Reset value = 0000 0000
Register 168. CLK3 Initial Phase Offset
BitD7D6D5D4D3D2D1D0
Name
CLK3_PHOFF[6:0]
Type
R/W R/W R/W R/W R/W R/W R/W R/W
Bit Name Function
7 Reserved Only write 0 to this bit.
6:0 CLK3_PHOFF[6:0] Clock 3 Initial Phase Offset.
CLK3_PHOFF[6:0] is an unsigned integer with one LSB equivalent to a time delay of
Tvco/4, where Tvco is the period of the VCO/PLL associated with this output.
Register 169. CLK4 Initial Phase Offset
BitD7D6D5D4D3D2D1D0
Name
CLK4_PHOFF[6:0]
Type
R/W R/W R/W R/W R/W R/W R/W R/W
Bit Name Function
7 Reserved Only write 0 to this bit.
6:0 CLK4_PHOFF[6:0] Clock 4 Initial Phase Offset.
CLK4_PHOFF[6:0] is an unsigned integer with one LSB equivalent to a time delay of
Tvco/4, where Tvco is the period of the VCO/PLL associated with this output.
Register 170. CLK5 Initial Phase Offset
BitD7D6D5D4D3D2D1D0
Name
CLK5_PHOFF[6:0]
Type
R/W R/W R/W R/W R/W R/W R/W R/W
Bit Name Function
7 Reserved Only write 0 to this bit.
6:0 CLK5_PHOFF[6:0] Clock 5 Initial Phase Offset.
CLK5_PHOFF[6:0] is an unsigned integer with one LSB equivalent to a time delay of
Tvco/4, where Tvco is the period of the VCO/PLL associated with this output.