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Hitachi Lightning 9900™ User and Reference Guide xi
List of Figures
Figure 2.1 Lightning 9900™ HiStar Network (HSN) Architecture .....................11
Figure 2.2 9960 Subsystem Frames...........................................13
Figure 2.3 9910 Subsystem Frame ...........................................13
Figure 2.4 Conceptual ACP Array Domain......................................19
Figure 2.5 Sample RAID-1 Layout ............................................23
Figure 2.6 Sample RAID-5 Layout (Data Plus Parity Stripe) ........................24
Figure 2.7 Sample Hard Disk Drive Intermix....................................25
Figure 2.8 Sample Device Emulation Intermix ..................................26
Figure 3.1 Fibre-Channel Device Addressing....................................31
Figure 4.1 IOCP Definition for FICON™ Channels (direct connect and via
FICON™ switch) .................................................55
Figure 4.2 IOCP Definition for 1024 LVIs (9900 connected to host CPU(s) via ESCD) .....56
Figure 4.3 IOCP Definition for 1024 LVIs (9900 directly connected to CPU)............57
Figure 4.4 Master MENU (Step 1) ............................................61
Figure 4.5 Basic HCD Panel (Step 2)..........................................62
Figure 4.6 Define, Modify, or View Configuration Data (Step 3) ....................62
Figure 4.7 Control Unit List Panel (Step 4).....................................63
Figure 4.8 Add Control Unit Panel (Step 5) ....................................63
Figure 4.9 Selecting the Operating System (Step 6)..............................64
Figure 4.10 Control Unit Chpid, CUADD, and Device Address Range Addressing (Step 7) . . 64
Figure 4.11 Select Processor / Control Unit Panel (Step 8).........................65
Figure 4.12 Control Unit List (Step 9)..........................................65
Figure 4.13 I/O Device List Panel (Step 10).....................................66
Figure 4.14 Add Device Panel (Step 11)........................................66
Figure 4.15 Device / Processor Definition Panel – Selecting the Processor ID (Step 12) ...67
Figure 4.16 Define Device / Processor Panel (Step 13) ............................67
Figure 4.17 Device / Processor Definition Panel (Step 14) .........................68
Figure 4.18 Define Device to Operating System Configuration (Step 15)...............68
Figure 4.19 Define Device Parameters / Features Panel (Step 16) ...................69
Figure 4.20 Update Serial Number, Description and VOLSER Panel (Step 18) ...........69
Figure 4.21 LVI Initialization for MVS: ICKDSF JCL................................71
Figure 4.22 Displaying Cache Statistics Using MVS DFSMS ..........................73
Figure 4.23 IDCAMS LISTDATA COUNTS (JCL example).............................73
Figure 4.24 Fibre Port-to-LUN Addressing ......................................77
Figure 4.25 Alternate Pathing ...............................................79
Figure 5.1 Diagram of Power Plugs for Three-Phase 9960 Disk Array Unit (Europe)......82
Figure 5.2 Diagram of Power Plugs for Three-Phase 9960 Disk Array Unit (USA)........83
Figure 5.3 Diagram of Power Plugs for Three-Phase 9960 Disk Array Unit (Europe)......83
Figure 5.4 Internal Cable Diagram of a Single-Phase 9960 Subsystem ................86
Figure 5.5 Internal Cable Diagram of a Single-Phase 9910 Subsystem ................87
Figure 5.6 Power Plugs for Single-Phase 9960 Controller (USA).....................88
Figure 5.7 Power Plugs for Single-Phase 9910 Subsystem (USA).....................88
Figure 5.8 Power Plugs for a Single-Phase 9960 Controller (Europe).................89
Figure 5.9 Power Plugs for a Single-Phase 9910 Subsystem (Europe).................89
Figure 5.10 Power Plugs for Single-Phase 9960 Disk Array Unit (USA) .................90