Filter
Top Products
30 Chapter 3
Functional and Operational Characteristics
3.3 Cache Management
3.3.1 Algorithms for Cache Control
The 9900 subsystem places all read and write data in cache, and 100% of cache memory is
available for read operations. The amount of fast-write data in cache is dynamically
managed by the cache control algorithms to provide the optimum amount of read and write
cache, depending on the workload read and write I/O characteristics.
The algorithms for internal cache control used by the 9900 include the following:
Hitachi Data Systems Intelligent Learning Algorithm. The Hitachi Data Systems
Intelligent Learning Algorithm identifies random and sequential data access patterns and
selects the amount of data to be “staged” (read from disk into cache). The amount of
data staged can be a record, partial track, full track, or even multiple tracks, depending
on the data access patterns.
Least-recently-used (LRU) algorithm (modified). When a read hit or write I/O occurs in
a nonsequential operation, the least-recently-used (LRU) algorithm marks the cache
segment as most recently used and promotes it to the top of the appropriate LRU list. In
a sequential write operation, the data is destaged by priority, so the cache segment
marked as least-recently used is immediately available for reallocation, since this data is
not normally accessed again soon.
Sequential prefetch algorithm. The sequential prefetch algorithm is used for
sequential-access commands or access patterns identified as sequential by the
Intelligent Learning Algorithm. The sequential prefetch algorithm directs the ACPs to
prefetch up to one full RAID stripe (24 tracks) to cache ahead of the current access. This
allows subsequent access to the sequential data to be satisfied from cache at host
channel transfer speeds.
Note: The 9900 subsystem supports S/390
®
extended count key data (ECKD) commands for
specifying cache functions.
3.3.2 Write Pending Rate
The write pending rate is the percent of total cache used for write pending data. The
amount of fast-write data stored in cache is dynamically managed by the cache control
algorithms to provide the optimum amount of read and write cache based on workload I/O
characteristics. Hitachi CruiseControl and Graph-Track allow users to collect and view the
write-pending-rate data and other cache statistics for the Lightning 9900™ subsystem.
Note: If the write pending limit is reached, the 9900 sends DASD fast-write delay or retry
indications to the host until the appropriate amount of data can be destaged from cache to
the disks to make more cache slots available.