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Chapter 1. Overview
1-1
PRELIMINARYÑSUBJECT TO CHANGE WITHOUT NOTICE
Chapter 1
Overview
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This chapter provides an overview of Rev. D of the MPC860T, focussing primarily on the
Fast Ethernet controller (FEC). It provides a discussion of its basic features and a general
look at how the MPC860T can be implemented. This document is provided as a supplement
to the
MPC860 PowerQUICC UserÕs Manual.
Note
This supplement documents Rev D silicon of the MPC860T,
which includes enhancements made to the original MPC860T.
New functionality and changes are shown with change bars and
was made available with Rev D MPC860T at 3Q99. This
document does not replace the supplement that describes the
Rev B.x silicon.
1.1 Document Revision History
Table 1-1 lists signiÞcant changes between revisions of this document.
1.2 Overview
The MPC860T is an enhancement to the MPC8xx family with its incorporation of a Fast
Ethernet communication controller. The 10/100 Fast Ethernet controller with integrated
FIFOs and bursting DMA is implemented independently, so high-performance Fast
Ethernet connectivity can be achieved without affecting the CPM performance.
Like the other MPC860 devices, the MPC860T can be used in a variety of controller
applications, excelling particularly in communications and networking products such as
routers that provide WAN-to-LAN functionality. The MPC860T, with the addition of the
10/100Mbps Ethernet channel, adds Fast Ethernet to the already broad list of
communications support.
Table 1-1. Document Revision History
Document Revision Substantive Changes
Rev 0.8 Changed the port D pin function multiplexing control bit Þeld name in the ECNTRL register from
ÔV860TÕ to ÔFEC_PINMUXÕ. See Section Chapter 2, ÒFEC External Signals,Ó and Section 6.2.8,
ÒEthernet Control Register (ECNTRL).Ó
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Freescale Semiconductor, Inc.
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