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HP E1459A Register Definitions 99
DATA REGISTERS for each port.
100 CLEAR SCREEN
110 DIM A$[40]
120 Vxi_address=70900
130 !
140 CLEAR 7
150 OUTPUT Vxi_address;"*RST;*CLS"
! reset E1406
160 !
170 REPEAT
180 OUTPUT Vxi_address;"SYST:ERR?"
190 ENTER Vxi_address;Error
200 PRINT "E1406 Reports Error: ";Error
210 UNTIL (Error=0)
220 !
230 OUTPUT Vxi_address;"VXI:WRITE 128,4,1"
! reset E1459A
240 WAIT .1
250 OUTPUT Vxi_address;"VXI:WRITE 128,4,0"
! un-reset E1459A
260 WAIT .1
270 !
275 ! dav enable, ext clk, edge enable, port 0
280 OUTPUT Vxi_address;"VXI:WRITE 128,16,7"
285 ! unmask high order 8 pos bits for port 0
290 OUTPUT Vxi_address;"VXI:WRITE 128,24,-256"
295 ! unmask high order 8 neg bits for port 0
300 OUTPUT Vxi_address;"VXI:WRITE 128,26,-256"
310 !
315 ! dav enable, ext clk, edge enable, port 1
320 OUTPUT Vxi_address;"VXI:WRITE 128,32,7"
325 ! unmask high order 8 pos bits for port 1
330 OUTPUT Vxi_address;"VXI:WRITE 128,36,-256"
335 ! unmask high order 8 neg bits for port 1
340 OUTPUT Vxi_address;"VXI:WRITE 128,38,-256"
350 !
355 ! set debounce to 16 uS (250 KHz) for ports 0/1
360 OUTPUT Vxi_address;"VXI:WRITE 128,30,2"
370 !
375 ! E1459A ints disabled, port 2/3 select
380 OUTPUT Vxi_address;"VXI:WRITE 128,4,16"
390 !
395 ! dav enable, ext clk, edge enable, port 2
400 OUTPUT Vxi_address;"VXI:WRITE 128,16,7"
405 ! unmask high order 8 pos bits for port 2
410 OUTPUT Vxi_address;"VXI:WRITE 128,24,-256"
415 ! unmask high order 8 neg bits for port 2
420 OUTPUT Vxi_address;"VXI:WRITE 128,26,-256"
430 !
435 ! dav enable, ext clk, edge enable, port 3
440 OUTPUT Vxi_address;"VXI:WRITE 128,32,7"
445 ! unmask high order 8 pos bits for port 3
450 OUTPUT Vxi_address;"VXI:WRITE 128,36,-256"
455 ! unmask high order 8 neg bits for port 3
460 OUTPUT Vxi_address;"VXI:WRITE 128,38,-256"
470 !
475 ! set debounce to 16 uS (250 KHz) for ports 2/3
480 OUTPUT Vxi_address;"VXI:WRITE 128,46,2"
490 !
500 OUTPUT Vxi_address;"*SRE 128"