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SE7221BK1-E Technical Product Specification
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6. ACPI Implementation
6.1 ACPI
An ACPI-aware operating system generates an SMI to request that the system be switched into
ACPI mode. The BIOS responds to enable ACPI mode. The system automatically returns to
legacy mode upon hard reset or power-on reset.
The SE7221BK1-E platform supports S0, S1, S4, and S5 states. When the system is operating
in ACPI mode, the OS retains control of the system and OS policy determines the entry
methods and wake up sources for each sleep state
Note: Sleep entry and wake up event capabilities are provided by the hardware but are enabled
by the operating system.
S0 Sleep State
The S0 sleep state is when everything is on. This is the state that no sleep is
enabled.
S1 Sleep State
The S1 sleep state is a low wake-up latency sleep state. In this state, no
system context is lost (Processor or chipset). The system context is
maintained by the hardware.
S4 Sleep State
The S4 Non-Volatile Sleep state (NVS) is a special global system state that
allows system context to be saved and restored (relatively slowly) when
power is lost to the baseboard. If the system has been commanded to enter
the S4 sleep state, the operating system will write the system context to a
non-volatile storage file and leave appropriate context markers.
S5 Sleep State
The S5 sleep state is similar to the S4 sleep state except the operating
system does not save any context nor enable any devices to wake the
system. The system is in the “soft” off state and requires a complete boot
when awakened.
6.1.1 Front Panel Switches
The baseboard supports two front panel buttons:
Power button
Reset button
Power Button Off to On:
The power button input (J1J1 pin 11and 13) provides
FP_PWR_BTN_N signal to the mBMC (PC87431M). mBMC will
output a MBMC_PWR_BTN_N signal to ICH6. If the PWRBTN#
signal of ICH6R is asserted, the assertion causes a wake event.
And then, the SLP_S3 signal of ICH6R will be not asserted. The
SLP_S3 signal will be passed to the PS_ON# signal of ATX power