USB-1616HS-2 User's Guide Functional Details
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Due to the time it takes to shift the digital data out to the DACs, plus the actual settling time of the digital-to-
analog conversion, the DACs actually take up to 4 µs after the start of scan to settle on the updated value.
The data for the DACs and pattern digital output comes from a PC-based buffer. The data is streamed across the
USB2 bus to the USB-1616HS-2.
You can update the DACs and pattern digital output with the output scan clock—either internally-generated or
externally-applied. In this scenario, the acquisition input scans are not synchronized to the analog outputs or
pattern digital outputs.
You can also synchronize everything—input scans, DACs, pattern digital outputs—to one clock, which is either
internally-generated or externally-applied.
Digital I/O
Twenty-four TTL-level digital I/O lines are included in each USB-1616HS-2. You can program digital I/O in
8-bit groups as either inputs or outputs and scan them in several modes (see "Digital input scanning
" below).
You can access input ports asynchronously from the PC at any time, including when a scanned acquisition is
occurring.
Digital input scanning
Digital input ports can be read asynchronously before, during, or after an analog input scan.
Digital input ports can be part of the scan group and scanned along with analog input channels. Two
synchronous modes are supported when digital inputs are scanned along with analog inputs. Refer to "Example
4: Sampling digital inputs for every analog sample in a scan group" on page 13 for more information.
In both modes, adding digital input scans has no affect on the analog scan rate limitations.
If no analog inputs are being scanned, the digital inputs can sustain rates up to 4 MHz.
Higher rates—up to 12 MHz—are possible depending on the platform and the amount of data being transferred.
Digital outputs and pattern generation
Digital outputs can be updated asynchronously at anytime before, during, or after an acquisition. You can use
two of the 8-bit ports to generate a digital pattern at up to 4 MHz. The USB-1616HS-2 supports digital pattern
generation with bus mastering DMA. The digital pattern can be read from PC RAM.
Higher rates—up to 12 MHz—are possible depending on the platform and the amount of data being transferred.
Digital pattern generation is clocked using an internal clock. The onboard programmable clock generates
updates ranging from once every 1 second to 1 MHz, independent of any acquisition rate.
Triggering
Triggering can be the most critical aspect of a data acquisition application. The USB-1616HS-2 supports the
following trigger modes to accommodate certain measurement situations.