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Chapter 3 Hardware Overview
AT E Series User Manual 3-14 ni.com
Selecting a bipolar range for a particular DAC means that any data written
to that DAC is interpreted as two’s complement format. In two’s
complement mode, data values written to the AO channel can be either
positive or negative. If you select unipolar range, data is interpreted in
straight binary format. In straight binary mode, data values written to the
AO channel range must be positive.
♦ AT-MIO-16XE-10
You can configure each AO channel for either unipolar or bipolar output.
A unipolar configuration has a range of 0 to 10 V at the analog output.
A bipolar configuration has a range of –10 to +10 V at the analog output.
You do not need to configure both channels for the same range.
Analog Output Reglitch Selection
♦ AT-MIO-16E-1, AT-MIO-16E-2, and AT-MIO-64E-3 only
In normal operation, a DAC output glitches whenever it is updated with
a new value. The glitch energy differs from code to code and appears
as distortion in the frequency spectrum. Each analog output of the
AT-MIO-16E-1, AT-MIO-16E-2, and AT-MIO-64E-3 contains a reglitch
circuit that generates uniform glitch energy at every code rather than large
glitches at the major code transitions. This uniform glitch energy appears
as a multiple of the update rate in the frequency spectrum. Notice that this
reglitch circuit does not eliminate the glitches; it only makes them more
uniform in size. Reglitching is normally disabled at startup and can be
independently enabled for each channel through software.
Analog Trigger
♦ AT-MIO-16E-1, AT-MIO-16E-2, AT-MIO-64E-3, AT-MIO-16XE-10, and
AT-AI-16XE-10 only
In addition to supporting internal software triggering and external digital
triggering to initiate a data acquisition sequence, the AT-MIO-16E-1,
AT-MIO-16E-2, AT-MIO-64E-3, AT-MIO-16XE-10, and AT-AI-16XE-10
also support analog triggering. You can configure the analog trigger
circuitry to accept either a direct analog input from the PFI0/TRIG1 pin
on the I/O connector or a postgain signal from the output of the PGIA, as
shown in Figure 3-8. The trigger-level range for the direct analog channel
is ±10 V in 78 mV steps for the AT-MIO-16E-1, AT-MIO-16E-2, and
AT-MIO-64E-3, and ±10 V in 4.9 mV steps for the AT-MIO-16XE-10 and
AT-AI-16XE-10. The range for the post-PGIA trigger selection is simply