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• Up to two quad-rank RDIMMs and up to three dual- or single-rank RDIMMs can be populated per channel. When a
quad-rank RDIMM is populated in the first slot with white release levers, the third DIMM slot in the channel with
green release levers cannot be populated.
• Populate DIMM sockets only if a processor is installed. For single-processor systems, sockets A1 to A12 are
available. For dual-processor systems, sockets A1 to A12 and sockets B1 to B12 are available.
• Populate all sockets with white release tabs first, then black, and then green.
• Do not populate the third DIMM socket in a channel with green release tabs, if a quad-rank RDIMM is populated in
the first socket with white release tabs.
• Populate the sockets by highest rank count in the following order - first in sockets with white release levers, then
black, and then green. For example, if you want to mix quad-rank and dual-rank DIMMs, populate quad-rank DIMMs
in the sockets with white release tabs and dual-rank DIMMs in the sockets with black release tabs.
• In a dual-processor configuration, the memory configuration for each processor must be identical. For example, if
you populate socket A1 for processor 1, then populate socket B1 for processor 2, and so on.
• Memory modules of different sizes can be mixed provided that other memory population rules are followed (for
example, 2 GB and 4 GB memory modules can be mixed).
• Populate four DIMMs per processor (one DIMM per channel) at a time to maximize performance.
• If memory modules with different speeds are installed, they will operate at the speed of the slowest installed
memory module(s) or slower depending on system DIMM configuration.
• Populate DIMMs based on the following processor-heat sink configurations.
Processor
Configuration
Processor
Type (in
Watts)
Heat
Sink
Number of DIMMs
Maximum System Capacity Reliability, Availability, and
Serviceability (RAS) Features
Single processor up to 95 W 57 mm 12 12
Single processor 115 W or 130
W
77 mm 10 (Three DIMMs in channels
1 and 3 and two DIMMs in
channels 0 and 2)
8 (Two DIMMs per channel)
Single processor E5-2643,
E5-2637v2 or
EOT
97 mm 8 (Three DIMMs in channels 1
and 3 and one DIMM in
channels 0 and 2)
4 (One DIMM per channel)
Dual processor up to 95 W 57 mm 24 24
Dual processor 115 W or 130
W
77 mm 20 (Three DIMMs in channels
1 and 3 and two DIMMs in
channels 0 and 2)
16 (Two DIMMs per channel)
Dual processor E5-2643,
E5-2637v2 or
EOT
97 mm 16 (Three DIMMs in channels
1 and 3 and one DIMM in
channels 0 and 2)
8 (One DIMM per channel)
NOTE: For 97mm heatsink, Advanced ECC only supports 4 DIMMs per processor. Advanced ECC with Memory
Mirroring and Sparing is not supported in this configuration.
Mode-specific guidelines
Four memory channels are allocated to each processor. The allowable configurations depend on the memory mode
selected.
NOTE: x4 and x8 DRAM based DIMMs can be mixed providing support for RAS features. However, all guidelines
for specific RAS features must be followed. x4 DRAM based DIMMs retain Single Device Data Correction (SDDC)
in memory optimized (independent channel) mode. x8 DRAM based DIMMs require Advanced ECC mode to gain
SDDC.
The following sections provide additional slot population guidelines for each mode.
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