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10002367-02 PmT1 and PmE1 User’s Manual
6-1
Section 6
TDM Interface
The Time Division Multiplexor (TDM) processes channelized serial data such as T1 and E1.
The data channels can be routed internally to the QUICC to any of the SCC or SMC control-
lers. Each port can be configured to be either T1 or E1 at manufacturing. The TDM interface
consists of:
• Three signals for the transmitter (L1TXD, L1TCLK, L1TSYNC)
• Three for the receiver (L1RXD, L1RCLK, L1RSYNC)
• Each direction has a data, clock and sync signal
The PmT1 supports two T1 TDM ports and the PmE1 supports two E1 TDM ports. The TDM
signals are converted to T1 or E1 signaling by either the DS2151Q or DS2153Q transceivers
and are routed to the front panel connectors (P1 and P2).
Tab le 6 -1 and Ta b le 6 - 3 indicate
which QUICC pins are dedicated to the TDM, and how the T1 or E1 signals from the trans-
ceiver are routed to the connectors.
Configurations that route T1 or E1 out the P14 connector bypass the protection circuitry.
The FCC Part 68 and UL1950 certification can be met by providing an external circuit pro-
tection card.
The DS2153Q on the PmE1 requires specific initialization (reference Application Note 342;
DS2151, DS2153 Initialization and Programming, Dallas Semiconductor 102899):
1 Set CCR2 to 0x04. This causes the framer to switch to RCLK if TCLK stops.
2 Wait for at least 10 ms.
3 Zero all of the framer registers except the LOTCMC bit that was set in step 1. This is
important since the framer has no reset and cannot be guaranteed to be in an absolute
known state after power-up.
4 Configure the desired framer settings.
5 Set the LIRST bit in CCR3
6 Clear the LIRST bit in CCR3.
Table 6-1: TDM to T1E1 Port Connections for TDMB (P1)
QUICC Pins to Transceiver: Direction: DS215xQ Function:
PA(11) L1TXDB TSER
PA(0) L1TCLKB TCLK
PC(7) L1TSYNCB TSYNC
PA(10) L1RXDB RSER
PA(2) L1RCLKB RCLK
PC(6) L1RSYNCB RSYNC