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Datasheet 25
Technologies
3.2 Security Technologies
3.2.1 Intel
®
Advanced Encryption Standard New Instructions
(Intel
®
AES-NI) Instructions
These instructions enable fast and secure data encryption and decryption, using the
Advanced Encryption Standard (Intel AES-NI) which is defined by FIPS Publication
number 197. Since Intel AES-NI is the dominant block cipher, and it is deployed in
various protocols, the new instructions will be valuable for a wide range of applications.
The architecture consists of six instructions that offer full hardware support for Intel
AES-NI. Four instructions support the Intel AES-NI encryption and decryption, and the
other two instructions support the Intel AES-NI key expansion. Together, they offer a
significant increase in performance compared to pure software implementations.
The Intel AES-NI instructions have the flexibility to support all three standard Intel
AES-NI key lengths, all standard modes of operation, and even some nonstandard or
future variants.
Beyond improving performance, the Intel AES-NI instructions provide important
security benefits. Since the instructions run in data-independent time and do not use
lookup tables, the instructions help in eliminating the major timing and cache-based
attacks that threaten table-based software implementations of Intel AES-NI. In
addition, these instructions make AES simple to implement, with reduced code size.
This helps reducing the risk of inadvertent introduction of security flaws, such as
difficult-to-detect side channel leaks.
3.2.2 Execute Disable Bit
The Intel Execute Disable Bit functionality can help prevent certain classes of malicious
buffer overflow attacks when combined with a supporting operating system.
• Allows the processor to classify areas in memory by where application code can
execute and where it cannot.
• When a malicious worm attempts to insert code in the buffer, the processor
disables code execution, preventing damage and worm propagation.
3.3 Intel
®
Hyper-Threading Technology (Intel
®
HT
Technology)
The processor supports Intel
®
Hyper-Threading Technology (Intel
®
HT Technology)
that allows an execution core to function as two logical processors. While some
execution resources such as caches, execution units, and buses are shared, each
logical processor has its own architectural state with its own set of general-purpose
registers and control registers. This feature must be enabled using the BIOS and
requires operating system support.
For more information on Intel Hyper-Threading Technology, see
http://www.intel.com/products/ht/hyperthreading_more.htm.