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Datasheet 33
Power Management
4.2.2 Low-Power Idle States
When the processor is idle, low-power idle states (C-states) are used to save power.
More power savings actions are taken for numerically higher C-States. However, higher
C-states have longer exit and entry latencies. Resolution of C-states occurs at the
thread, processor core, and processor package level. Thread level C-states are
available if Intel Hyper-Threading Technology is enabled. Entry and exit of the C-states
at the thread and core level are shown in Figure 4-2.
While individual threads can request low-power C-states, power saving actions only
take place once the core C-state is resolved. Core C-states are automatically resolved
by the processor. For thread and core C-states, a transition to and from C0 is required
before entering any other C-state.
Figure 4-1. Idle Power Management Breakdown of the Processor Cores
Figure 4-2. Thread and Core C-State Entry and Exit