Intel BX80633I74930K Computer Hardware User Manual


 
Datasheet 41
Power Management
4.3.2.2 Self-Refresh Exit
Self-refresh exit can be either a message from an external unit (PCU in most cases, but
also possibly from any message-channel master) or as reaction for an incoming
transaction.
Here are the proper actions on self-refresh exit:
CK is enabled, and four CK cycles driven.
When proper skew between Address/Command and CK are established, assert
CKE.
Issue NOPs for tXSRD cycles.
Issue ZQCL to each rank.
The global scheduler will be enabled to issue commands.
4.3.2.3 DLL and PLL Shutdown
Self-refresh, according to configuration, may be a trigger for master DLL shut-down
and PLL shut-down. The master DLL shut-down is issued by the memory controller
after the DRAMs have entered self-refresh.
The PLL shut-down and wake-up is issued by the PCU. The memory controller gets a
signal from the PLL indicating that the memory controller can start working again.
4.3.3 DRAM I/O Power Management
Unused signals are tri-stated to save power. This includes all signals associated with an
unused memory channel.
The I/O buffer for an unused signal should be tri-stated (output driver disabled); the
input receiver (differential sense-amp) should be disabled. The input path must be
gated to prevent spurious results due to noise on the unused signals (typically handled
automatically when input receiver is disabled).
4.4 Direct Media Interface 2 (DMI2) / PCI Express*
Power Management
Active State Power Management (ASPM) support using L1 state; L0s is not supported.
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