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Datasheet, Volume 1 35
Interfaces
2.4.1.4 2D Engine
The Display Engine fetches the raw data from the memory, puts the data into a stream,
converts the data into raw pixels, organizes pixels into images, blends different planes
into a single image, encodes the data, and sends the data out to the display device.
The Display Engine executes its functions with the help of three main functional blocks
– Planes, Pipes, and Ports, except for eDP. The Planes and Pipes are in the processor
while the Ports reside in the PCH. Intel FDI connects the display engine in the processor
with the Ports in the PCH. The 2D Engine adds a new display pipe C that enables
support for three simultaneous and concurrent display configurations.
2.4.1.4.1 Processor Graphics Registers
The 2D registers consists of original VGA registers and others to support graphics
modes that have color depths, resolutions, and hardware acceleration features that go
beyond the original VGA standard.
2.4.1.4.2 Logical 128-Bit Fixed BLT and 256 Fill Engine
This BLT engine accelerates the GUI of Microsoft Windows* operating systems. The
128-bit BLT engine provides hardware acceleration of block transfers of pixel data for
many common Windows operations. The BLT engine can be used for the following:
• Move rectangular blocks of data between memory locations
• Data alignment
• To perform logical operations (raster ops)
The rectangular block of data does not change, as it is transferred between memory
locations. The allowable memory transfers are between cacheable system memory and
frame buffer memory, frame buffer memory and frame buffer memory, and within
system memory. Data to be transferred can consist of regions of memory, patterns, or
solid color fills. A pattern is always 8 x 8 pixels wide and may be 8, 16, or 32 bits per
pixel.
The BLT engine expands monochrome data into a color depth of 8, 16, or 32 bits. BLTs
can be either opaque or transparent. Opaque transfers move the data specified to the
destination. Transparent transfers compare destination color to source color and write
according to the mode of transparency selected.
Data is horizontally and vertically aligned at the destination. If the destination for the
BLT overlaps with the source memory location, the BLT engine specifies which area in
memory to begin the BLT transfer. Hardware is included for all 256 raster operations
(source, pattern, and destination) defined by Microsoft, including transparent BLT.
The BLT engine has instructions to invoke BLT and stretch BLT operations, permitting
software to set up instruction buffers and use batch processing. The BLT engine can
perform hardware clipping during BLTs.