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44 Datasheet, Volume 1
3.5 Intel
®
Advanced Vector Extensions (Intel
®
AVX)
Intel Advanced Vector Extensions (Intel AVX) is the latest expansion of the Intel
instruction set. It extends the Intel Streaming SIMD Extensions (Intel SSE) from 128-
bit vectors to 256-bit vectors. Intel AVX addresses the continued need for vector
floating-point performance in mainstream scientific and engineering numerical
applications, visual processing, recognition, data-mining / synthesis, gaming, physics,
cryptography and other application areas.
The enhancement in Intel AVX allows for improved performance due to wider vectors,
new extensible syntax, and rich functionality including the ability to better manage,
rearrange, and sort data. In the processor, new instructions were added to allow
graphics, media and imaging applications to speed up the processing of large amount
of data by reducing the memory bandwidth and footprint. The new instructions convert
operands between single-precision floating point values and half-precision (16 bit)
floating point values.
For more information on Intel AVX, see http://www.intel.com/software/avx.
3.6 Security and Cryptography Technologies
3.6.1 Intel
®
Advanced Encryption Standard New Instructions
(Intel
®
AES-NI)
The processor supports Intel Advanced Encryption Standard New Instructions (Intel
AES-NI) that are a set of Single Instruction Multiple Data (SIMD) instructions that
enable fast and secure data encryption and decryption based on the Advanced
Encryption Standard (AES). Intel AES-NI are valuable for a wide range of cryptographic
applications, for example: applications that perform bulk encryption / decryption,
authentication, random number generation, and authenticated encryption. AES is
broadly accepted as the standard for both government and industry applications, and is
widely deployed in various protocols.
AES-NI consists of six Intel SSE instructions. Four instructions, namely AESENC,
AESENCLAST, AESDEC, and AESDELAST facilitate high performance AES encryption and
decryption. The other two, AESIMC and AESKEYGENASSIST, support the AES key
expansion procedure. Together, these instructions provide a full hardware for support
AES, offering security, high performance, and a great deal of flexibility.
3.6.2 PCLMULQDQ Instruction
The processor supports the carry-less multiplication instruction, PCLMULQDQ.
PCLMULQDQ is a Single Instruction Multiple Data (SIMD) instruction that computes the
128-bit carry-less multiplication of two, 64-bit operands without generating and
propagating carries. Carry-less multiplication is an essential processing component of
several cryptographic systems and standards. Hence, accelerating carry-less
multiplication can significantly contribute to achieving high speed secure computing
and communication.