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1 Terminology........................................................................................................... 12
2 Related Documents..................................................................................................15
3 Processor DIMM Support by Product...........................................................................18
4 Supported UDIMM Module Configurations....................................................................18
5 PCI Express* Supported Configurations in Server / Workstation Products........................22
6 Processor Supported Audio Formats over HDMI*and DisplayPort*.................................. 34
7 Valid Three Display Configurations through the Processor..............................................35
8 DisplayPort and Embedded DisplayPort* Resolutions for 1, 2, 4 Lanes – Link Data
Rate of RBR, HBR, and HBR2.....................................................................................35
9 System States.........................................................................................................49
10 Processor Core / Package State Support..................................................................... 49
11 Integrated Memory Controller States..........................................................................49
12 PCI Express* Link States.......................................................................................... 49
13 Direct Media Interface (DMI) States........................................................................... 50
14 G, S, and C Interface State Combinations .................................................................. 50
15 D, S, and C Interface State Combination.....................................................................50
16 Coordination of Thread Power States at the Core Level................................................. 52
17 Coordination of Core Power States at the Package Level............................................... 55
18 Digital Thermal Sensor (DTS) 1.1 Thermal Solution Performance Above T
CONTROL
............. 66
19 Thermal Margin Slope.............................................................................................. 67
20 Boundary Conditions, Performance Targets, and T
CASE
Specifications.............................. 68
21 Intel
®
Turbo Boost Technology 2.0 Package Power Control Settings............................... 75
22 Signal Description Buffer Types................................................................................. 77
23 Memory Channel A...................................................................................................77
24 Memory Channel B...................................................................................................78
25 Memory Reference and Compensation ....................................................................... 79
26 Reset and Miscellaneous Signals................................................................................80
27 PCI Express* Graphics Interface Signals..................................................................... 81
28 Display Interface Signals.......................................................................................... 81
29 Direct Media Interface (DMI) – Processor to PCH Serial Interface................................... 82
30 Phase Locked Loop (PLL) Signals............................................................................... 82
31 Testability Signals....................................................................................................82
32 Error and Thermal Protection Signals..........................................................................83
33 Power Sequencing................................................................................................... 84
34 Processor Power Signals........................................................................................... 84
35 Sense Pins..............................................................................................................84
36 Ground and Non-Critical to Function (NCTF) Signals..................................................... 85
37 Processor Internal Pull-Up / Pull-Down Terminations.................................................... 85
38 VR 12.5 Voltage Identification................................................................................... 87
39 Signal Groups......................................................................................................... 91
40 Processor Core Active and Idle Mode DC Voltage and Current Specifications.................... 94
41 Memory Controller (V
DDQ
) Supply DC Voltage and Current Specifications.........................95
42 VCCIO_OUT, VCOMP_OUT, and VCCIO_TERM .............................................................96
43 DDR3/DDR3L Signal Group DC Specifications.............................................................. 96
44 Digital Display Interface Group DC Specifications......................................................... 97
45 Embedded DisplayPort* (eDP) Group DC Specifications.................................................98
46 CMOS Signal Group DC Specifications.........................................................................98
47 GTL Signal Group and Open Drain Signal Group DC Specifications..................................98
48 PCI Express* DC Specifications..................................................................................99
49 PECI DC Electrical Limits...........................................................................................99
50 Processor Loading Specifications..............................................................................102
51 Package Handling Guidelines................................................................................... 102
52 Processor Materials................................................................................................ 103
Processor—Contents
Intel
®
Xeon
®
Processor E3-1200 v3 Product Family
Datasheet – Volume 1 of 2 June 2013
6 Order No.: 328907-001