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200 1.5 Mb PRI implementation
Note: Clocking slips can occur between systems that are clocked from
different COs, if the COs are not synchronized. The slips can degrade
voice quality.
The Clock Controller circuitry synchronizes the system to an external
reference clock, and generates and distributes the clock to the system. A
Small System can function either as a slave to an external clock or as a
clocking master.
The NTAK20AA version of the clock controller meets AT&T Stratum 3 and
Bell Canada Node Category D specifications. The NTAK20BA version
meets CCITT stratum 4 specifications.
Clocking modes
The system supports a single clock controller that can operate in one of two
modes - tracking or non-tracking (also known as free-r un).
Tracking mode In tracking mode, one or possibly two DTI/PRI cards
supply a clock reference to a clock controller daughterboard. One DTI/PRI
is defined as the primary reference source for clock synchronization, while
the other is defined as the secondary reference source (PREF and SREF in
LD 73).
There are two stages to clock controller tracking, as follows:
•
tracking a reference
•
locked onto a reference
When tracking a reference, the clock controller uses an algorithm to match
its frequency to the frequency of the incoming clock. When the frequencies
are very nearly matched, the clock controller locks onto the reference. The
clock controller makes small adjustments to its own frequency until incoming
and system frequencies correspond.
If the incoming clock reference is stable, the internal clock controller tracks
it, locks onto it, and matches frequencies exactly. Occasionally, however,
environmental circumstances cause the external or internal clocks to drift.
When this happens, the internal clock controller briefly enters the tracking
stage. The green LED flashes momentarily until the clock controller locks
onto the reference once again.
If the incoming reference is unstable, the internal clock controller is
continuously in the tracking stage, with the LED flashing green all the time.
This condition does not present a problem, instead it shows that the clock
controller is continually attempting to lock onto the signal. However, if slips
are occurring, there is a problem with the clock controller or the incoming
line.
Nortel Communication Server 1000
ISDN Primary Rate Interface Installation and Commissioning
NN43001-301 02.03 Standard
Release 5.5 7 December 2007
Copyright © 2003-2007, Nortel Networks
.