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SAM88RI INSTRUCTION SET S3C9228/P9228
6-20
DI — Disable Interrupts
DI
Operation: SYM (2) ¨ 0
Bit zero of the system mode register, SYM.2, is cleared to "0", globally disabling all interrupt
processing. Interrupt requests will continue to set their respective interrupt pending bits, but the
CPU will not service them while interrupt processing is disabled.
Flags: No flags are affected.
Format:
Bytes Cycles Opcode
(Hex)
opc 1 4 8F
Example: Given: SYM = 04H:
DI
If the value of the SYM register is 04H, the statement "DI" leaves the new value 00H in the
register and clears SYM.2 to "0", disabling interrupt processing.