S3C9228/P9228 CONTROL REGISTERS
4-15
P0INT –Port 0 Interrupt Enable Register EDH
Bit Identifier .7 .6 .5 .4 .3 .2 .1 .0
RESETRESET Value
– – – – 0 0 0 0
Read/Write
– – – – R/W R/W R/W R/W
.7-.4
Not used for S3C9228/P9228
.3
P0.3's Interrupt Enable Bit
0 Disable interrupt
1 Enable interrupt
.2
P0.2's Interrupt Enable Bit
0 Disable interrupt
1 Enable interrupt
.1
P0.1's Interrupt Enable Bit
0 Disable interrupt
1 Enable interrupt
.0
P0.0's Interrupt Enable Bit
0 Disable interrupt
1 Enable interrupt