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SAM88RI INSTRUCTION SET S3C9228/P9228
6-16
CLR — Clear
CLR dst
Operation: dst ¨ "0"
The destination location is cleared to "0".
Flags: No flags are affected.
Format:
Bytes Cycles Opcode
(Hex)
Addr Mode
dst
opc dst 2 4 B0 R
4 B1 IR
Examples: Given: Register 00H = 4FH, register 01H = 02H, and register 02H = 5EH:
CLR 00H → Register 00H = 00H
CLR @01H → Register 01H = 02H, register 02H = 00H
In Register (R) addressing mode, the statement "CLR 00H" clears the destination register 00H
value to 00H. In the second example, the statement "CLR @01H" uses Indirect Register (IR)
addressing mode to clear the 02H register value to 00H.