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2 Troubleshooting Procedures
PORTEGE M700/M750 Maintenance Manual (960-661) [CONFIDENTIAL] 2-21
Table 2-5 Debug port error status (1/6)
D port
status
Inspection items Target device IC number
setup of CPU ,
Initialization of MCH ,
Initialization of ICH ,
EC access check,
setup of PIT,
Initialization of ICH and
Super I/O
CPU, MCH(Register)
ICH(RegisterPIT
Controller, MEM I/O),
EC/KBC(EC), BIOSROM,
Super I/O
IS1050 (CPU Socket)
IC1200 (MCH)
IC1600 (ICH)
IC3200 (EC/KBC)
IC3001, IC3002 (BIOS
ROM)
IC3400 (Super I/O)
F000
BIOS ROM check,
Problematic to BIOS
ROM data.
BIOSROM
IC3001, IC3002 (BIOS
ROM)
F001 EC/KBC rewrite check
EC/KBC(KBC)
BIOSROM
IC3200 (EC/KBC)
IC3001, IC3002 (BIOS
ROM)
F002 Initialization of KBC
EC/KBC(EC, KBC)
BIOSROM
IC3200 (EC/KBC)
IC3001, IC3002 (BIOS
ROM)
Initialization of EC
F003 Initialization failure of EC
F004
Initialization failure of EC
(HW obstacle)
F005 setup of CPU CPU, BIOSROM
IS1050 (CPU Socket)
IC3001, IC3002 (BIOS
ROM)
F006
F007 BIOS ROM check EC/KBC(EC), BIOSROM
IC3200 (EC/KBC)
IC3001, IC3002 (BIOS
ROM)
F008
End of IRT Boot Block
processing. Shifts to
IRT.