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2 Troubleshooting Procedures
2-22 [CONFIDENTIAL] PORTEGE M700/M750 Maintenance Manual (960-661)
Table 2-5 Debug port error status (2/6)
D port
status
Inspection items Target device IC number
System BIOS IRT processing
F100
setup of CPU ,
Initialization of ICH,
MCH and Super I/O,
setup of SD controller,
setup of PIT
CPU, ICH(PCI Register,
PIT Controller), MCH(PCI
Register),
SD Controller,
BIOSROM, Super I/O
IS1050 (CPU Socket)
IC1200 (MCH)
IC1600 (ICH)
IC2000 (SD Cont.)
IC3001, IC3002 (BIOS
ROM)
IC3400 (Super I/O)
F101
Initialization of Memory,
Memory error,
setup for using a RAM
area,
check of a RAM area,
MCH(PCI Register),
RAM(SPD, Memory),
ICH(PCI Register,
CMOS), CPU,
BIOSROM
IC1200 (MCH)
CN1400, CN1410 (RAM
Conn.)
IC1600 (ICH)
IS1050 (CPU Socket)
IC3001, IC3002 (BIOS
ROM)
F102
setup of CPU,
setup of CMOS,
CMOS error
CPU, ICH(CMOS),
BIOSROM
IS1050 (CPU Socket)
IC1600 (ICH)
IC3001, IC3002 (BIOS
ROM)
F103
Transition to RESUME-
MAIN ,
BIOS processing
reading,
ROM read error
ICH(CMOS),
BIOSROMRAM
CN1400,CN1410 (RAM
Conn.)
IC1600 (ICH)
IC3001, IC3002 (BIOS
ROM)
F104
BIOS signature check
EC/KBC(EC), TPM
CPU
IC3300 (TPM)
IC3200 (EC/KBC)
IC3201(EEPROM)
IS1050 (CPU Socket)
F105
setup of RAM,
Initialization of ICH
(APIC)
CPU, ICH(CMOS, PIC
Controller I/O, MEM I/O),
RAM
IS1050 (CPU Socket)
CN1400, CN1410 (RAM
Conn.)
IC1600 (ICH)