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CY7C601xx, CY7C602xx
Document 38-16016 Rev. *E Page 13 of 68
13 7 2 SUB A, [X+expr] C, Z 40 4 1 NOP 6D 4 1 RRC A C, Z
14 7 2 SUB [expr], A C, Z 41 9 3 AND reg[expr], expr Z 6E 7 2 RRC [expr] C, Z
15 8 2 SUB [X+expr], A C, Z 42 10 3 AND reg[X+expr],
expr
Z 6F 8 2 RRC [X+expr] C, Z
16 9 3 SUB [expr], expr C, Z 43 9 3 OR reg[expr], expr Z 70 4 2 AND F, expr C, Z
17 10 3 SUB [X+expr], expr C, Z 44 10 3 OR reg[X+expr], expr Z 71 4 2 OR F, expr C, Z
18 5 1 POP A Z 45 9 3 XOR reg[expr], expr Z 72 4 2 XOR F, expr C, Z
19 4 2 SBB A, expr C, Z 46 10 3 XOR reg[X+expr],
expr
Z 73 4 1 CPL A Z
1A 6 2 SBB A, [expr] C, Z 47 8 3 TST [expr], expr Z 74 4 1 INC A C, Z
1B 7 2 SBB A, [X+expr] C, Z 48 9 3 TST [X+expr], expr Z 75 4 1 INC X C, Z
1C 7 2 SBB [expr], A C, Z 49 9 3 TST reg[expr], expr Z 76 7 2 INC [expr] C, Z
1D 8 2 SBB [X+expr], A C, Z 4A 10 3 TST reg[X+expr], expr Z 77 8 2 INC [X+expr] C, Z
1E 9 3 SBB [expr], expr C, Z 4B 5 1 SWAP A, X Z 78 4 1 DEC A C, Z
1F 10 3 SBB [X+expr], expr C, Z 4C 7 2 SWAP A, [expr] Z 79 4 1 DEC X C, Z
20 5 1 POP X 4D 7 2 SWAP X, [expr] 7A 7 2 DEC [expr] C, Z
21 4 2 AND A, expr Z 4E 5 1 SWAP A, SP Z 7B 8 2 DEC [X+expr] C, Z
22 6 2 AND A, [expr] Z 4F 4 1 MOV X, SP 7C 13 3 LCALL
23 7 2 AND A, [X+expr] Z 50 4 2 MOV A, expr Z 7D 7 3 LJMP
24 7 2 AND [expr], A Z 51 5 2 MOV A, [expr] Z 7E 10 1 RETI C, Z
25 8 2 AND [X+expr], A Z 52 6 2 MOV A, [X+expr] Z 7F 8 1 RET
26 9 3 AND [expr], expr Z 53 5 2 MOV [expr], A 8x 5 2 JMP
27 10 3 AND [X+expr], expr Z 54 6 2 MOV [X+expr], A 9x 11 2 CALL
28 11 1 ROMX Z 55 8 3 MOV [expr], expr Ax 5 2 JZ
29 4 2 OR A, expr Z 56 9 3 MOV [X+expr], expr Bx 5 2 JNZ
2A 6 2 OR A, [expr] Z 57 4 2 MOV X, expr Cx 5 2 JC
2B 7 2 OR A, [X+expr] Z 58 6 2 MOV X, [expr] Dx 5 2 JNC
2C 7 2 OR [expr], A Z 59 7 2 MOV X, [X+expr] Ex 7 2 JACC
Fx 13 2 INDEX Z
Table 10-1. Instruction Set Summary Sorted Numerically by Opcode Order (continued)
Opcode Hex
Cycles
Bytes
Instruction Format
[1, 2]
Flags
Opcode Hex
Cycles
Bytes
Instruction Format Flags
Opcode Hex
Cycles
Bytes
Instruction Format Flags
Notes
1. Interrupt routines take 13 cycles before execution resumes at interrupt vector table.
2. The number of cycles required by an instruction is increased by one for instructions that span 256 byte boundaries in the Flash memory space.
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