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CY7C601xx, CY7C602xx
Document 38-16016 Rev. *E Page 51 of 68
Table 18-11. Programmable Interval Timer High (PITMRH) [0x27] [R]
Bit # 7 6 5 4 3 2 1 0
Field Reserved Prog Interval Timer [11:8]
Read/Write -- -- -- -- RRR R
Default 0 0 0 0 000 0
Bit [7:4]: Reserved
Bit [3:0]: Prog Internal Timer [11:8]
This register holds the high order nibble of the 12-bit programmable interval timer. Reading this register returns the high order
nibble of the 12-bit timer at the instant when the low order byte was last read.
Table 18-12. Programmable Interval Reload Low (PIRL) [0x28] [R/W]
Bit # 7 6 5 4 3 2 1 0
Field Prog Interval [7:0]
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Default 0 0 0 0 000 0
Bit [7:0]: Prog Interval [7:0]
This register holds the lower eight bits of the timer. When writing into the 12-bit reload register, write lower byte first then the higher
nibble.
Table 18-13. Programmable Interval Reload High (PIRH) [0x29] [R/W]
Bit # 7 6 5 4 3 2 1 0
Field Reserved Prog Interval[11:8]
Read/Write -- -- -- -- R/W R/W R/W R/W
Default 0 0 0 0 000 0
Bit [7:4]: Reserved
Bit [3:0]: Prog Interval [11:8]
This register holds the higher 4 bits of the timer. When writing into the 12-bit reload register, write lower byte first then the higher
nibble.
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