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Document 38-16016 Rev. *E Page 46 of 68
Table 17-3. SPI Mode Timing vs. LSB First, CPOL, and CPHA
LSB
First CPHA CPOL Diagram
00
0
001
010
011
100
101
110
111
SCLK
SSEL
DATA
X X
MSB Bit 2Bit 3Bit 4Bit 5Bit 6Bit 7 LSB
SCLK
SSEL
X X
DATA
MSB Bit 2Bit 3Bit 4Bit 5Bit 6Bit 7 LSB
SCLK
SSEL
X X
DATA
MSB Bit 2Bit 3Bit 4Bit 5Bit 6Bit 7 LSB
SCLK
SSEL
DATA
X X
MSB Bit 2Bit 3Bit 4Bit 5Bit 6Bit 7 LSB
SCLK
SSEL
DATA
X X
MSBBit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7LSB
SCLK
SSEL
X X
DATA
MSBB it 2 B i t 3 Bit 4 B i t 5 B i t 6 Bit 7LSB
SCLK
SSEL
X X
DATA
MSBBit 2Bit 3Bit 4Bit 5Bit 6Bit 7LSB
SCLK
SSEL
DATA
X MSB XBit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7LSB
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