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CHAPTER 6: Troubleshooting
74
06 Do R/W test to CH-2 count reg. Initialize CH-0 as system timer. Install the
POSTINT1Ch handler. Enable IRQ-0 in PIC for system timer interrupt.
Trap INT1Ch vector to “POSTINT1ChHandlerBlock.”
08 Initialize the CPU. The BAT test is being done on KBC. The keyboard controller
command byte is being programmed after Auto detection of KB/MS using AMI KB-5.
C0 Early CPU Init Start — Disable Cache - Init Local APIC
C1 Set up boot strap processor information.
C2 Set up boot strap processor for POST.
C5 Enumerate and set up application processors.
C6 Re-enable cache for boot strap processor.
C7 Early CPU Init Exit.
0A Initialize the 8042 compatible keyboard controller.
0B Detect the presence of PS/2 mouse.
0C Detect the presence of keyboard in KBC port.
0E Testing and initialization of different input devices. Also, update the Kernel
Variables.
Trap the INT09h vector, so that the POST INT09h handler gets control for IRQ1.
Uncompress all available language, BIOS logo, and Silent logo modules.
13 Early POST initialization of chipset registers.
24 Uncompress and initialize any platform specific BIOS modules.
30 Initialize System Management Interrupt.
2A Initialize different devices through DIM.
See “DIM code checkpoints” on page 77 for more information.
2C Initialize different devices. Detects and initializes the video adapter installed in the
system that has optional ROMs.
2E Initialize all the output devices.
31 Allocate memory for ADM module and uncompress it. Give control to ADM module
for initialization. Initialize language and font modules for ADM. Activate ADM
module.
33 Initialize the silent boot module. Set the window for displaying text information.
37 Displaying sign-on message, CPU information, setup key message, and any
OEM-specific information.
38 Initialize different devices through DIM. See “DIM code checkpoints” on page 77 for
more information.
39 Initialize DMAC-1 and DMAC-2.
3A Initialize RTC date/time.
3B Test for total memory installed in the system. Also, press DEL or ESC keys to limit
memory test. Display total memory in the system.
3C Mid-POST initialization of chipset registers.
Check
point
Description