Intel SE7525GP2 Computer Hardware User Manual


 
Intel® Server Board SE7320SP2 & Intel Server Board SE7525GP2 TPS Platform Management
Revision 2.0
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The management controller generates a ‘Secure Mode Violation Attempt’ event message if an
attempt it made to power-down, sleep, or reset the system using the push buttons while Secure
Mode is active.
The mBMC will prevent the system from powering up via button press when either secure mode
or the front panel lockout I/O signal is asserted.
5.3.5 Secure Mode Operation
Secure mode is a signal from the SIO/keyboard controller. Power and reset buttons are locked
out, except for the NMI and Chassis ID buttons. A security violation event is generated if buttons
are pressed while secure mode active.
The Secure Mode feature allows the front panel switches and other system resources to be
protected against unauthorized use or access. Secure Mode is enabled and controlled via the
Set Secure Mode Options command.
If it is enabled, Secure Mode can be controlled via the Secure Mode KB signal from the
keyboard controller. When Secure Mode is active, pressing a protected front panel switch
generates a Secure Mode Violation event. Specifically, this generates an assertion of the
Secure Mode Violation Attempt offset of the mBMC’s Platform Security Violation Attempt sensor.
The Secure Mode state is cleared whenever AC power or system power is applied, when a
system reset occurs, or when a mBMC reset occurs. The Secure Mode state includes the bits
that specify the actions that are to be taken when Secure Mode is active, as well as the Force
Secure Mode On bit.
The Set Secure Mode Options command allows specific front panel switches to be protected
irrespective of Secure Mode state. Please see the command definition in the IPMI v1.5
specification for details.
The NMI switch can be locked using the Set Secure Mode Options command but is never
protected by Secure Mode. This allows a system to be recovered from a hung state when
Secure Mode is active
5.3.6 FRU Information
The platform management architecture supports providing FRU (Field Replaceable Unit)
information for the server board and major replaceable modules in the chassis. ‘Major Module’
is defined as any circuit board in the system containing active electronic circuitry.
FRU information includes board serial number, part number, name, asset tag, and other
information. FRUs that contain a management controller use the controller to provide access to
the FRU information. FRUs that lack a management controller can make their FRU information
available via a SEEPROM directly connected to the IPMB or a private I
2
C bus. This allows the
system integrator to provide a chassis FRU device without having to implement a management
controller. This information can be accessed via IPMI FRU commands or using Master Write-
Read commands.
The mBMC implements the interface for logical FRU inventory devices as specified in the
Intelligent Platform Management Interface Specification, Version 1.5. This functionality provides
commands used for accessing and managing the FRU inventory information associated with the
mBMC (FRU ID 0). These commands can be delivered via all interfaces.