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Intel® Server Board SE7320SP2 & Intel Server Board SE7525GP2 TPS Functional Architecture
Revision 2.0
46
3.6.1.2 P64-A: 64-bit, 66MHz PCI Subsystem
There is a single 64-bit PCI-X bus segments directed through the Intel 6300ESB I/O Hub. The
PCI-X segment, P64-A supports the interface for two 3.3V 64-bit PCI-X slots.
3.6.1.3 P64-Express4: x4 PCI-Express Bus Segment
The P64-Express4 bus segment supports x4 PCI-Express signaling. The Intel Server Boards
SE7320SP2 and SE7525GP2 implement a x8 PCI-Express connector on this bus to enhance
the breadth of supported devices, however all devices will operate at a maximum speed of x4
(2GB/s).
3.6.1.4 P64-Express16: x16 PCI-Express bus segment
The P64-Express16 bus segment supports x16 PCI-Express signaling on the Intel Server Board
SE7525GP2 only.
3.6.1.5 Scan Order
The BIOS assigns PCI bus numbers in a depth-first hierarchy, in accordance with the PCI Local
Bus Specification. When a bridge device is located, the bus number is incremented in exception
of a bridge device in the chipsets. Scanning continues on the secondary side of the bridge until
all subordinate buses are defined. PCI bus numbers may change when PCI-PCI bridges are
added or removed. If a bridge is inserted in a PCI bus, all subsequent PCI bus numbers below
the current bus will be increased by one.
3.6.1.6 Resource Assignment
The resource manager assigns the PIC-mode interrupt for the devices that will be accessed by
the legacy code. The BIOS will ensure the PCI BAR registers and the command register for all
devices are correctly set up to match the behavior of the legacy BIOS. Code cannot make
assumptions about the scan order of devices or the order in which resources will be allocated to
them. The BIOS will support the INT 1Ah PCI BIOS interface calls.
3.6.1.7 Automatic IRQ Assignment
The BIOS automatically assigns IRQs to devices in the system for legacy compatibility. No
method is provided to manually configure the IRQs for devices
.
3.6.1.8 Option ROM Support
The option ROM support code in the BIOS will dispatch the option ROMs in available memory
space in the address range 0c0000h-0e7fffh and will follow all rules with respect to the option
ROM space. The BIOS for the Intel Server Boards SE7320SP2 and SE7525GP2 will integrate
option ROMs for all the integrated components on the board.
3.6.1.9 PCI APIs
The system BIOS supports the INT 1Ah, AH = B1h functions as defined in the PCI BIOS
Specification. The system BIOS supports the real mode interfaces and does not support the
protected mode interfaces.