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Intel® Server Board SE7320SP2 & Intel Server Board SE7525GP2 TPS Functional Architecture
Revision 2.0
63
Table 15: SMM Space Table
Global Enable
G_SMRAME
High Enable
H_SMRAME
TSEG Enable
TSEG_EN
Compatible
(C) Range
High (H)
Range
TSEG (T)
Range
0 X X Disable Disable Disable
1 0 0 Enable Disable Disable
1 0 1 Enable Disable Enable
1 1 0 Disable Enable Disable
1 1 1 Disable Enable Enable
3.7.2 I/O Map
The server board I/O addresses to be mapped to the processor bus or through designated
bridges in a multi-bridge system. Other PCI devices, including the Intel 6300ESB I/O Controller,
have built-in features that support PC-compatible I/O devices and functions, which are mapped
to specific addresses in I/O space. On SE7320SP2 and SE7525GP2, the Intel 6300ESB I/O
Controller provides the bridge to ISA functions.
The I/O map in the following table shows the location in I/O space of all direct I/O-accessible
registers. PCI configuration space registers for each device control mapping in I/O and memory
spaces, and other features that may affect the global I/O map.
Table 16: I/O Map
Address (es) Resource Notes
0000h – 000Fh DMA Controller 1
0010h – 001Fh DMA Controller 2 Aliased from 0000h – 000Fh
0020h – 0021h Interrupt Controller 1
0022h – 0023h
0024h – 0025h Interrupt Controller 1 Aliased from 0020 – 0021h
0026h – 0027h
0028h – 0029h Interrupt Controller 1 Aliased from 0020h – 0021h
002Ah – 002Bh
002Ch – 002Dh Interrupt Controller 1 Aliased from 0020h – 0021h
002Eh – 002Fh Super I/O (SIO) index and Data ports
0030h – 0031h Interrupt Controller 1 Aliased from 0020h – 0021h
0032h – 0033h
0034h – 0035h Interrupt Controller 1 Aliased from 0020h – 0021h
0036h – 0037h
0038h – 0039h Interrupt Controller 1 Aliased from 0020h – 0021h
003Ah – 003Bh
003Ch – 003Dh Interrupt Controller 1 Aliased from 0020h – 0021h
003Eh – 003Fh
0040h – 0043h Programmable Timers
0044h – 004Fh
0050h – 0053F Programmable Timers
0054h – 005Fh
0060h, 0064h Keyboard Controller Keyboard chip select from 87417
0061h NMI Status & Control Register