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Intel® Server Board SE7320SP2 & Intel Server Board SE7525GP2 TPS Functional Architecture
Revision 2.0
42
Table 7: Possible Memory Capacities
# of
DIMMS
Spare 128Mb 256Mb 512Mb 1Gb
1 256MB 512MB 1GB 2GB
2 Single Chan 512MB 1GB 2GB 4GB
2 1GB 2GB 4GB 8GB
4 X 1GB 2GB 4GB 8GB
4 X 2GB 4GB 8GB
Note: Memory between 4GB and 4GB minus 512MB will not be accessible for use by the
operating system and may be lost to the user, because this area is reserved for BIOS, APIC
configuration space, PCI adapter interface, and virtual video memory space. This means that if
4GB of memory is installed, 3.5GB of this memory is usable. The chipset should allow the
remapping of unused memory above the 4GB address, but this memory may not be accessible
to an operating system that has a 4GB memory limit.
The minimum memory installed may be 256MB (one 256MB DIMM).
3.5.3 I2C Bus
To boot the system, the system BIOS uses a dedicated I2C bus to retrieve DIMM information
needed to program the MCH memory registers.
3.5.4 Disabling DIMMs
The BIOS provides a mechanism to disable a DIMM if it is detected to be faulty. A faulty DIMM
is defined to have either multiple correctable errors or a single uncorrectable error on a single
DIMM. Memory errors are logged during runtime and single bit ECC Errors are counted.
Though DIMMs are marked as “Disabled”, they are actually disabled only during the next reboot.
At the next system boot, memory-sizing code reads the recorded state of the DIMMs and skips
sizing DIMMs marked as disabled. Because DIMMs are always used in 2-way interleaving, the
DIMM pair is disabled. The disabled DIMMs are indicated by an LED next to the DIMM socket.
If all DIMMs in a system have been disabled, the BIOS generates beep codes to indicate that
the system has no usable memory.
Disabled DIMMs/rows may be re-enabled through a BIOS Setup option. The DIMM slot will no
longer be disabled if the system boots without memory in the DIMM slot.
3.5.5 Memory RASUM Features
The Intel E7320 MCH and Intel E7525 MCH support several memory RASUM (Reliability,
Availability, Serviceability, Usability, and Manageability) features that have traditionally been
found only on high end server systems. These features include x4 SDDC for memory error
detection and correction, Memory Scrubbing, Retry on Correctable Errors, Integrated Memory
Initialization, and DIMM Sparing. The following sections describe how each is supported on the
Intel Server Boards SE7320SP2 and SE7525GP2.