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This setting is necessary only on the polling unit (Unit 0). This setting deter-
mines the number of LR bits that will be transferred via the LR area for each
PC Link Unit.
Setting No. of LR bits PC Link Units No. of LR bits PC Link Units
Single-level Single-level Multilevel Multilevel
0 32 32 32 16
1 64 16 64 8
2 128 8 128 4
3 256 4 256 2
4 512 2
5 Setting
6 unavailable
7
8
9
As there is a maximum number of LR bits available for use in the LR area
and since the number of available bits must be split equally among the PC
Link Units of the System, as the number of bits required by a particular Unit
increases, the maximum number of PC Link Units in the Subsystem must
decrease. As the number of Units required in the Subsystem increases, the
number of LR bits assigned to each PC Link Unit must decrease.
Set switch 5 to the right if only wire cable is used in the System, and to the
left if optical links are used between Link Adapters.
Set switch 6 to the left to connect (turn ON) termination resistance (220 Ω),
and to the right to disconnect (turn OFF) termination resistance. The termina-
tion resistance must be turned ON in the first and last PC Link Units in each
Subsystem.
Pins 5 through 7 are not used and must be set to OFF. The rest of the pins
are set as described below.
This setting determines the number of LR bits refreshed during each PC
scan. The number set here must be equal to or greater than the number of
LR bits transferred per PC set on switch 4.
Reducing the number of bits refreshed will shorten the PC scan time, but it
will increase the transmission time in the PC Link System. These relation-
ships are shown in the following tables along with pin settings.
Pin 1 Pin 2 No. of refresh bits Increase in scan time
OFF OFF 512 8.9 ms
OFF ON 256 5.7 ms
ON OFF 128 3.6 ms
ON ON 64 2.8 ms
Switch 4:
Number of LR Bits
Switch 5:
Transmission Line Selector
Switch 6:
Termination Resistance
Switch 7:
Back-panel DIP Switch
Pins 1 and 2:
I/O Refresh Bits
C200H PC Link Units Section 4-1