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2 Instructions
2-146
CP1E CPU Unit Instructions Reference Manual(W483)
Sample program
• When CIO 0.00 is ON, CIO 100 will be shifted 10 bits to the right (from the leftmost bit to the right-
most bit). The number of bits to shift is specified in bits 0 to 7 of W0. The contents of bit 15 of CIO 100
is copied into the bits from which data was shifted and the contents of the leftmost bit of data which
was shifted out of range, is shifted into the Carry Flag (CY). All other data is lost.
.
When CIO 0.00 is ON, CIO 100 and CIO 101 will be shifted 10 bits to the right (from the leftmost bit to
the rightmost bit). The number of bits to shift is specified in bits 0 to 7 of W0 (control data). The contents
of bit 15 of CIO will be copied into the bits from which data was shifted and the contents of the leftmost
bit of data which was shifted out of range will be shifted into the Carry Flag (CY). All other data is lost.
NASR
100
W0
0.00
D
C
C0
8
11
8
1215
0743
0 A
No. of bits to shift: 10 bits (0A Hex)
Data shifted into register
8 Hex: Contents of leftmost bit shifted in
Always 0.
0
15
100 1
100100
987
0
15 14 13 12 1011
4398 21
100100
100 1 1 1 1 1 1 1 111
CY
1
Leftmost bit
Lost
No. of bits to shift: 10 bits
(Contents of the leftmost
bit is inserted.)
NSRL
100
W0
0.00
D
C
C0
8
11
8
1215
0743
0 A
No. of bits to shift: 10 bits (0A Hex)
Always 0.
Data shifted into register
8 Hex: Contents of leftmost bit shifted in
0
15
101 1
000100
87 0
15
879
15
876 0
101
0
1 0 0 0 1 0 010
CY
1
1001
100100
0
6
100100
1001 1 1 1 1 1 1 111
0 1 0 0 0 1 0 0 0
15
000100
Leftmost bit
Lost
No. of bits to shift: 10 bits
(Contents of the leftmost
bit is inserted.)