Renesas M16C/6NK Laptop User Manual


 
Rev.1.10 Jul 01, 2005 page 47 of 318
REJ09B0124-0110
M16C/6N Group (M16C/6NK, M16C/6NM) 7. Clock Generating Circuit
Under development
This document is under development and its contents are subject to change.
7.2 CPU Clock and Peripheral Function Clock
Two type clocks: CPU clock to operate the CPU and peripheral function clocks to operate the peripheral
functions.
7.2.1 CPU Clock and BCLK
These are operating clocks for the CPU and watchdog timer.
The clock source for the CPU clock can be chosen to be the main clock, sub clock, on-chip oscillator clock
or the PLL clock.
If the main clock or on-chip oscillator clock is selected as the clock source for the CPU clock, the selected
clock source can be divided by 1 (undivided), 2, 4, 8 or 16 to produce the CPU clock. Use the CM06 bit in
the CM0 register and the CM17 to CM16 bits in the CM1 register to select the divide-by-n value.
When the PLL clock is selected as the clock source for the CPU clock, the CM06 bit should be set to 0
and the CM17 to CM16 bits to 00b (undivided).
After reset, the main clock divided by 8 provides the CPU clock.
Note that when entering stop mode from high- or medium-speed mode, on-chip oscillator mode or on-chip
oscillator low power dissipation mode, or when the CM05 bit in the CM0 register is set to 1 (main clock
turned off) in low-speed mode, the CM06 bit in the CM0 register is set to 1 (divide-by-8 mode).
7.2.2 Peripheral Function Clock
(f1, f2, f8, f32, f1SIO, f2SIO, f8SIO, f32SIO, fAD, fCAN0, fCAN1, fC32)
These are operating clocks for the peripheral functions.
Two of these, fi (i = 1, 2, 8, 32) and fiSIO are derived from the main clock, PLL clock or on-chip oscillator
clock by dividing them by i. The clock fi is used for timers A and B, and fiSIO is used for serial I/O. The f8
and f32 clocks can be output from the CLKOUT pin.
The fAD clock is produced from the main clock, PLL clock or on-chip oscillator clock, and is used for the
A/D converter.
The fCANi (i =0, 1) clock is derived from the main clock, PLL clock or on-chip oscillator clock by dividing
them by 1 (undivided), 2, 4, 8 or 16, and is used for the CAN module.
When the WAIT instruction is executed after setting the CM02 bit in the CM0 register to 1 (peripheral
function clock turned off during wait mode), or when the microcomputer is in low power dissipation mode,
the fi, fiSIO, fAD, fCAN0 and fCAN1 clocks are turned off
(1)
.
The fC32 clock is derived from the sub clock, and is used for timers A and B. This clock can be used when
the sub clock is activated.
NOTE
1. fCAN0 and fCAN1 clocks stop at H in CAN0, 1 sleep mode.
7.3 Clock Output Function
The f8, f32 or fC clock can be output from the CLKOUT pin. Use the CM01 to CM00 bits in the CM0 register
to select.